In an asynchronous transfer mode (ATM) switch system, an ATM node connects an ATM network to another ATM network or to ATM subscribers. The ATM switch system handles information of ATM cells, each cell having a predetermined fixed bit length and being transferred asynchronously in the ATM network.
Conventionally, the ATM switch system incorporates therein a switch device, a subscriber access block, a trunk access device, a plurality of link devices, and a device controller. The switch device exchanges the ATM cells between, e.g., two link devices. Each of the link devices performs serial/parallel conversion to transfer ATM cells between the switch device and the subscriber access device or the trunk access device, receives the ATM cells serially from the access device and provides the switch device with the received ATM cells parallel, e.g., with 4-bit data width (nibble-by-nibble), and a cell synchronization signal, e.g., a nibble cell synchronization (NCS) signal, activated during a first nibble transfer of each ATM cell.
Each of the link devices also monitors cell synchronization and applies a synchronization loss signal to the device controller. Specifically, each of the link devices checks whether or not the ATM cell applied thereto is synchronized with the NCS signal and activates the synchronization loss signal when the ATM cell is not synchronized with the NCS signal. For example, if one of the link devices is not connected physically to the subscriber access device/trunk access device, or is not synchronized with the access device/trunk access device, or has a heavy fault therein, said one of the link devices activates the corresponding synchronization loss signal.
The device controller checks periodically, e.g., at every 1 millisecond, the status of the synchronization loss signal applied from each of the link devices. When the device controller detects the activation of the synchronization loss signal from said one of the link devices, the device controller applies a malfunction signal to the switch device. In response to the malfunction signal, the switch device issues a control signal to said one of the link devices to replace same with a substitution device of the link devices.
Each of the devices incorporated in the ATM switch system, on the other hand, includes a clock generation unit which generates a nibble clock pulse (NCP) and two or more NCS signals. Said two or more NCS signals have different clock phases, wherein, for example, there are phase differences of 2N or 2N+1 periods of the NCP between them, N being a positive integer. As is known in the art, the NCP is used to process each of the ATM cells synchronously, whereas each NCS is used for each device to inform a counterpart device of the beginning point of time of the ATM cells. One of the two or more NCS signals is used for said each device to transfer ATM cells to a counterpart device synchronously; and the remainder of the two or more NCS signals are used for said each device to receive ATM cells transmitted from the counterpart device synchronously. The number of the one or more NCS signals corresponds to that of the devices in the ATM switch system.
Each device further includes a clock pulse division unit which produces a divided NCP to be used in converting the ATM cells of unit of nibble into data of unit of a preset bit length, e.g., byte, wherein the divided NCP is obtained by dividing the NCP by two. Based on the divided NCP, said each device converts the ATM cells applied thereto into data of unit of byte and then processes the data converted.
Since, however, the divided NCP is obtained by using only the NCP without taking into account the two or more NCS signals, there may exist phase discrepancies between each of the NCS signals and the divided NCP. Accordingly, in case a device in the ATM switch system alternately employs the two or more NCS signals, ATM cells being processed in the device may be lost or corrupted, lowering the reliability of data in the ATM switch system.